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| M Features * * * * * * * * * * * * * Four Independent 150 mA LDOs Low Supply Current (220 A typical) High Output Voltage Accuracy (0.5% typical) Low Dropout Voltage (100 mV typical with 150 mA load) Four Independent Shutdown Inputs Select ModeTM: Selectable Output Voltages for High Design Flexibility Integrated Independent Microprocessor Reset Low Noise Outputs Fast Response from Shutdown (10 s typical) RESET Output for Low Battery Detection or Reset Generator Over Current and Over-Temperature Protection Small 16-Pin QSOP Package Specified Junction Temperature Range: - -40C to +125C TC1307 All four LDOs have independent shutdown inputs and can be programmed using two select inputs making the TC1307 adaptable for a wide range of multiple output applications. The tri-state SELECT12 input pin allows the designer to select the output voltages on VOUT1, and VOUT2 from three different values (2.5V, 2.8V or 3.0V). The tri-state SELECT34 input pin allows the designer to select the output voltages on VOUT3, and VOUT4 from three different values (1.8V, 2.5V or 2.8V). All four LDO's require only a 1 F output capacitor for stability that can be ceramic, tantalum or aluminum over the entire input voltage operating range and 0 mA to 150 mA rated load range. All four LDOs have low output noise and excellent dynamic response when faced with sudden line and load changes. The voltage detect pin is set for a threshold of 2.63V (typical) and operates down to a minimum input voltage of 1.0V. When the voltage on the detect pin rises above the 2.63V threshold, the RESET output is held low for 300 ms (typical). Additional integrated features include over-current protection and over-temperature protection providing full protection from external load faults. Four-Channel CMOS LDO with Select Mode, Shutdown and Independent Reset Applications * * * * * * * * * Battery Operated Systems Potable Computers Set Top Boxes Load Partitioning Medical Instruments Cellular / GSM / PHS Phones Instrumentation Linear Post Regulator for SMPS Pagers Package Types QSOP VDET SHDN1 SELECT12 VIN VIN GND SHDN3 VIN 1 2 3 4 TC1307 5 6 7 8 12 VOUT3 11 VOUT4 10 SELECT34 9 16 RESET 15 SHDN2 14 VOUT1 13 VOUT2 Description The TC1307 combines four CMOS Low Dropout Linear Regulators with a Microcontroller Monitor in a spacesaving 16-Pin QSOP package. Developed specifically for battery powered portable applications, all four outputs of the TC1307 typically consume a total of 220 A supply current, hold the output voltage to a tolerance of 0.5% and require 100 mV of headroom for regulation at the maximum output current of 150 mA. In addition to the four high performance LDOs, the TC1307 also includes a voltage detector with a delayed RESET output that can be configured for low battery detection or Microcontroller Reset Generator. SHDN4 2002 Microchip Technology Inc. DS21702A-page 1 TC1307 1.0 1.1 ELECTRICAL CHARACTERISTICS Maximum Ratings* PIN FUNCTION TABLE Name VDET SHDN1 SELECT12 VIN VIN GND SHDN3 VIN SHDN4 SELECT34 VOUT4 VOUT3 VOUT2 VOUT1 SHDN2 RESET Function Voltage Detect Input Shutdown for VOUT1 Input for setting VOUT1 and VOUT2. Input Voltage Connection Input Voltage Connection Ground connection Shutdown for V OUT3 Input Voltage Connection Shutdown for V OUT4 Input for setting VOUT3 and VOUT4. LDO4 Output LDO3 Output LDO2 Output LDO1 Output Shutdown for V OUT2 Reset Output VDD..............................................................................6.5V All inputs and outputs w.r.t. ....... ...VIN + 0.3V to -0.3V Output Short Circuit Current ...... ...............continuous Storage temperature.................... .... -65C to +150C Operating Junction Temperature, TJ..................................................-40C < T J < +150C Maximum Junction Temperature, TJ..................150C ESD protection on all pins................................... 4 kV *Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Unless otherwise specified, all limits are established for VIN = VR+1, IL = 100 A, C L = 3.3 F, SHDN > VIH , TA = 25C. Boldface type specifications apply for junction temperatures, TJ (Note 9) of -40C to +125C. Parameter Input Characteristics: Input Operating Voltage Input Quiescent Current Input Shutdown Current Output Characteristics: Maximum Output Current Output Short Circuit Current (Average) Voltage Regulation LDO1/LDO2/LDO3/LDO4 IOUT_MAX IOUT_SC VOUT 150 -- 360 -- -- VR+2.5% mA mA V V OUT = 0V Note 2 VIN IIN IIN_SHDN 2.7 -- -- -- 220 0.1 6.0 370 0.5 V A A Note 1 SHDN = VIH , IL = 0 SHDN = 0V Sym Min Typ Max Units Conditions VR-2.5% VR 0.5 Note 1: The minimum VIN must meet two conditions: VIN 2.7V and VIN (VR + 2.5%) + VDROPOUT. 2: VR is the nominal regulator output voltage. For example: VR = 1.8V, 2.5V, 2.8V or 3.0V. 3: TCVOUT = (V OUT-HIGH - VOUT-LOW) * 106 / (VR * Temperature), VOUT-HIGH = Highest voltage measured over the temperature range. VOUT-LOW = Lowest voltage measured over the temperature range. 4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested over a load range from 1mA to the maximum specified output current. Changes in output voltage due to heating effects are determined using thermal regulation specification TCVOUT. 5: Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied. Specifications are for a current pulse equal to ILMAX at VIN = 6.0V for t = 10 msec. 6: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value with a 1V differential applied. 7: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e. TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum 150C rating. Sustained junction temperatures above 150C can impact the device reliability. 8: VTH-MIN = 2.55V and V TH-MAX = 2.70V. 9: The Junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the Ambient temperature is not significant. DS21702A-page 2 2002 Microchip Technology Inc. TC1307 Unless otherwise specified, all limits are established for VIN = VR+1, IL = 100 A, C L = 3.3 F, SHDN > VIH , TA = 25C. Boldface type specifications apply for junction temperatures, TJ (Note 9) of -40C to +125C. Parameter VOUT Temperature Coefficient LDO1/LDO2/LDO3/LDO4 Line Regulation LDO1/LDO2/ LDO3/LDO4 Load Regulation LDO1/LDO2/LDO3/LDO4 Thermal Regulation LDO1/LDO2/LDO3/LDO4 Dropout Voltage LDO1/LDO2/LDO3/LDO4 Sym TCVOUT VOUT/(VOUT xVIN ) VOUT/VOUT VOUT/PD VIN-VOUT Min -- -- -- -- -- -- -- -- Output Noise LDO1/LDO2/LDO3/LDO4 Thermal Shutdown Protection Thermal Shutdown Hysteresis eN -- Typ 20 40 0.05 -- 0.04 2 15 35 100 1.2 Max -- 0.2 2.0 -- -- -- 90 280 -- Units ppm/C Note 3 %/V % V/W mV (V R+1) VIN 6.0V IL = 0.1 mA to IOUT_MAX Note 4 Note 5 IL = 100 A, Note 6 IL = 20 mA, Note 6 IL = 50 mA, Note 6 IL = 150 mA, Note 6 V/(Hz)1/2 IOUT = 100 mA, f = 10 kHz C OUT = 1 F to noise C C % of VIN VIN = 2.7V to 6.0V % of VIN VIN = 2.7V to 6.0V sec V IN = 5V, IL = 100 mA, C OUT = 1 F, CIN = 1 F, see Figure 4-1 V IN = 5V, IL = 100 mA, C OUT = 1 F, CIN = 1 F, See Figure 4-1 V SHDN = VIN or GND V IN = 2.7V to 6.0V VIN = 2.7V to 6.0V VSELECT = VIN VSELECT = GND TA = 0C to +70C TA = -40C to +125C Note 7 Conditions Over Temperature Protection Characteristics: TSD TSD VIH VIL tWK -- -- 60 -- -- 150 10 -- -- 10 -- -- -- 15 -- SHDN Input Characteristics: SHDN Input High Threshold SHDN Input Low Threshold Wake-up Time (from SHDN mode) Settling Time (from SHDN mode) Shutdown Leakage Current SELECT Input Characteristics: SELECT Input High Threshold SELECT Input Low Threshold SELECT Input Leakage Current RESET Output Characteristics: Detect Operating Voltage Range VDET 1.0 1.2 -- -- 6.0 6.0 V V SELH VSELL ISELECT VIN -0.2 -- -- -- -- -- 0.11 0.06 -- 0.2 -- -- V V A tS -- 40 -- sec ISHDN -- 0.01 -- nA Note 1: The minimum VIN must meet two conditions: VIN 2.7V and VIN (VR + 2.5%) + VDROPOUT. 2: VR is the nominal regulator output voltage. For example: VR = 1.8V, 2.5V, 2.8V or 3.0V. 3: TCVOUT = (V OUT-HIGH - VOUT-LOW) * 106 / (VR * Temperature), VOUT-HIGH = Highest voltage measured over the temperature range. VOUT-LOW = Lowest voltage measured over the temperature range. 4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested over a load range from 1mA to the maximum specified output current. Changes in output voltage due to heating effects are determined using thermal regulation specification TCVOUT. 5: Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied. Specifications are for a current pulse equal to ILMAX at VIN = 6.0V for t = 10 msec. 6: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value with a 1V differential applied. 7: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e. TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum 150C rating. Sustained junction temperatures above 150C can impact the device reliability. 8: VTH-MIN = 2.55V and V TH-MAX = 2.70V. 9: The Junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the Ambient temperature is not significant. 2002 Microchip Technology Inc. DS21702A-page 3 TC1307 Unless otherwise specified, all limits are established for VIN = VR+1, IL = 100 A, C L = 3.3 F, SHDN > VIH , TA = 25C. Boldface type specifications apply for junction temperatures, TJ (Note 9) of -40C to +125C. Parameter Reset Threshold Voltage Sym V TH Min 2.59 2.55 -- -- -- 140 -- -- -- RESET Output Voltage High V OH-RES 0.8*VDET VDET1.5V Typ 2.63 -- 20 30 135 300 -- -- -- -- Max 2.66 2.70 40 -- -- 560 0.3 0.4 0.3 -- V Units V V A ppm/C sec msec V V DET = VTH to VTH - 100 mV, See Figure 4-2 See Figure 4-2 VDET = VTH-min ISINK = 1.2 mA VDET = VTH-min ISINK = 3.2 mA VDET > 1.0V ISINK = 50 A Note 8, See Figure 4-2 ISOURCE = 500 A Isource = 800 A VDET>VTH-max (Both cases), See Figure 4-2 Conditions TA = +25C TA = -40C to +125C See Figure 4-2 RESET = Open Reset Circuit Supply Current Reset Threshold Voltage Temperature Coefficient Detect Threshold to RESET Active Time Delay Reset Time-out Period RESET Output Voltage Low IVDET VTH-TEMP TVDET-RESET TRESET VOL-RES Temperature Ranges: Maximum Junction Temperature Range Maximum Junction Temperature Range Storage Temperature Range Thermal Package Resistances: Thermal Resistance, 16L-QSOP JA -- 112.4 -- C/W EIA/JEDEC JESD51-751-7 4 Layer Board TJ TJ TA -40 -40 -65 -- -- -- +150 +125 +150 C C C Note 1: The minimum VIN must meet two conditions: VIN 2.7V and VIN (VR + 2.5%) + VDROPOUT. 2: VR is the nominal regulator output voltage. For example: VR = 1.8V, 2.5V, 2.8V or 3.0V. 3: TCVOUT = (V OUT-HIGH - VOUT-LOW) * 106 / (VR * Temperature), VOUT-HIGH = Highest voltage measured over the temperature range. VOUT-LOW = Lowest voltage measured over the temperature range. 4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested over a load range from 1mA to the maximum specified output current. Changes in output voltage due to heating effects are determined using thermal regulation specification TCVOUT. 5: Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied. Specifications are for a current pulse equal to ILMAX at VIN = 6.0V for t = 10 msec. 6: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value with a 1V differential applied. 7: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air. (i.e. TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum 150C rating. Sustained junction temperatures above 150C can impact the device reliability. 8: VTH-MIN = 2.55V and V TH-MAX = 2.70V. 9: The Junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the Ambient temperature is not significant. DS21702A-page 4 2002 Microchip Technology Inc. TC1307 2.0 Note: TYPICAL PERFORMANCE CHARACTERISTICS The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, V IN = 3.8V, CIN = 10 F ceramic (X5R), COUT = 1 F ceramic (X5R), ILOAD = 100 A, SELECT12 = NC, SELECT34 = VIN, SHDN1/2/3/4 = VIN, TA = 25C. Junction temperature (T J) is approximated by soaking the device under test at an ambient temperature equal to the desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the Ambient temperature is not significant. 1.830 VIN = 2.8V 3.000 2.998 2.996 TJ = +125C TJ = +25C VIN = 4.0V TJ = +125C 1.825 Output Voltage (V) 1.820 1.815 Output Voltage (V) 2.994 2.992 2.990 2.988 2.986 2.984 2.982 2.980 2.978 TJ = -40C TJ = +25C TJ = -40C 1.810 1.805 1.800 0 25 50 75 100 125 150 0 25 50 75 100 125 150 Load Current (mA) Load Current (mA) FIGURE 2-1: 2.508 2.506 2.504 VOUT vs. Load Current. FIGURE 2-4: 1.816 VOUT vs. Load Current. VIN = 3.5V I LOAD = 100 A 1.814 TJ = +125C TJ = +125C Output Voltage (V) Output Voltage (V) 2.502 2.500 2.498 2.496 2.494 2.492 2.490 2.488 0 25 50 1.812 1.810 1.808 1.806 1.804 1.802 TJ = -40C TJ = +25C TJ = +25C TJ = -40C 75 100 125 150 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 Load Current (mA) Input Voltage (V) FIGURE 2-2: 2.805 VOUT vs. Load Current. FIGURE 2-5: 2.502 VOUT vs. Input Voltage. VIN = 3.8V TJ = +125C ILOAD = 100 A 2.8 2.5 Output Voltage (V) Output Voltage (V) 2.498 2.496 2.494 2.492 2.49 2.488 TJ = +125C 2.795 TJ = +25C TJ = -40C TJ = +25C 2.79 2.785 TJ = -40C 2.78 0 25 50 75 100 125 150 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 Load Current (mA) Input Voltage (V) FIGURE 2-3: VOUT vs. Load Current. FIGURE 2-6: VOUT vs. Input Voltage. 2002 Microchip Technology Inc. DS21702A-page 5 TC1307 Note: Unless otherwise indicated, V IN = 3.8V, CIN = 10 F ceramic (X5R), COUT = 1 F ceramic (X5R), ILOAD = 100 A, SELECT12 = NC, SELECT34 = VIN, SHDN1/2/3/4 = VIN, TA = 25C. Junction temperature (T J) is approximated by soaking the device under test at an ambient temperature equal to the desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the Ambient temperature is not significant. 2.796 ILOAD = 100 A 29.0 2.794 Output Voltage (V) 2.792 2.790 2.788 2.786 2.784 2.782 2.780 3.0 3.3 3.6 TJ = +125C IVDET Supply Current (A) 27.0 25.0 23.0 21.0 19.0 17.0 15.0 VDET = 2.8V RESET = OPEN TJ = +25C TJ = -40C 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 Input Voltage (V) Junction Temperature (C) FIGURE 2-7: VOUT vs. Input Voltage. FIGURE 2-10: VDET Supply Current vs. Junction Temperature. 30.0 VIN = 3.8V ILOAD1/2/3/4 = 0 mA 280 260 240 220 200 180 160 140 120 100 -40 -25 -10 5 20 35 50 65 80 95 110 125 IVDET Supply Current (A) IIN Supply Current (A) 25.0 20.0 VIN = 0V SHDN1/2/3/4 = 0V TJ = +25C TJ = -40C TJ = +125C 15.0 10.0 5.0 0.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 Junction Temperature (C) V DET Input Voltage (V) FIGURE 2-8: Temperature. 270 VIN Supply Current vs. Junction FIGURE 2-11: VDET Supply Current vs. VDET Input Voltage. I LOAD1/2/3/4 = 0 mA 1.40 SHDN1/2/3/4 = 0V IIN Supply Current (A) Shutdown Supply Current (A) 1.20 1.00 0.80 0.60 0.40 0.20 0.00 -40 240 TJ = +125C TJ = +25C VIN = 6.0V VIN = 3.8V VIN = 2.7V 210 TJ = -40C 180 2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6 Input Voltage (V) -25 -10 5 20 35 50 65 80 95 110 125 Junction Temperature (C) FIGURE 2-9: Supply Current vs. Input Voltage, VIN. FIGURE 2-12: Supply Temperature. Current vs. Junction DS21702A-page 6 2002 Microchip Technology Inc. TC1307 Note: Unless otherwise indicated, V IN = 3.8V, CIN = 10 F ceramic (X5R), COUT = 1 F ceramic (X5R), ILOAD = 100 A, SELECT12 = NC, SELECT34 = VIN, SHDN1/2/3/4 = VIN, TA = 25C. Junction temperature (T J) is approximated by soaking the device under test at an ambient temperature equal to the desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the Ambient temperature is not significant. 0.160 VOUT = 2.8V 0.140 Droput Voltage (V) 0.120 0.100 0.080 0.060 0.040 0.020 0.000 0 25 50 75 TJ = +25C TJ = -40C TJ = +125C 100 125 150 Load Current (mA) FIGURE 2-13: Dropout Voltage vs. Load Current. FIGURE 2-16: Crosstalk VOUT2, and VOUT3. Characteristics VOUT1, 0.140 VOUT = 3.0V 0.120 TJ = +125C Dropout Voltage (V) 0.100 TJ = +25C 0.080 0.060 0.040 0.020 0.000 0 25 TJ = +40C 50 75 100 125 150 Load Current (mA) FIGURE 2-14: Dropout Voltage vs. Load Current. FIGURE 2-17: Crosstalk VOUT2, and VOUT3. Characteristics VOUT1, FIGURE 2-15: Crosstalk VOUT2 and V OUT3. Characteristics VOUT1, FIGURE 2-18: Crosstalk VOUT2, and VOUT3. Characteristics VOUT1, 2002 Microchip Technology Inc. DS21702A-page 7 TC1307 Note: Unless otherwise indicated, V IN = 3.8V, CIN = 10 F ceramic (X5R), COUT = 1 F ceramic (X5R), ILOAD = 100 A, SELECT12 = NC, SELECT34 = VIN, SHDN1/2/3/4 = VIN, TA = 25C. Junction temperature (T J) is approximated by soaking the device under test at an ambient temperature equal to the desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the Ambient temperature is not significant. 70 60 50 PSSR (dB) 40 30 20 10 0 1.0E+01 VIN = 4.1V VOUT = 2.8V COUT = 10F Ceramic ILOAD = 100 mA 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 Ripple Voltage Frequency (Hz) FIGURE 2-19: Line Step Response. FIGURE 2-22: Power Supply Rejection Ratio vs. Ripple Voltage Frequency. FIGURE 2-20: Line Step Response. 70 60 50 FIGURE 2-23: Output Noise. VIN = 4.1V VOUT = 2.8V COUT = 1 F Ceramic ILOAD = 100 mA PSRR (dB) 40 30 20 10 0 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 Ripple Voltage Frequency (Hz) FIGURE 2-21: Power Supply Rejection Ratio vs. Ripple Voltage Frequency. FIGURE 2-24: Output Noise. DS21702A-page 8 2002 Microchip Technology Inc. TC1307 Note: Unless otherwise indicated, V IN = 3.8V, CIN = 10 F ceramic (X5R), COUT = 1 F ceramic (X5R), ILOAD = 100 A, SELECT12 = NC, SELECT34 = VIN, SHDN1/2/3/4 = VIN,TA = 25C. Junction temperature (T J) is approximated by soaking the device under test at an ambient temperature equal to the desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the Ambient temperature is not significant. 375 VDET = 0V to 2.7V 350 Reset Delay Time (ms) 325 300 275 250 225 200 -40 -25 -10 5 20 35 50 65 80 95 110 125 Junction Temperature (C) FIGURE 2-25: Response From SHDN. FIGURE 2-28: Power-Up Reset Time-out Period vs. Junction Temperature. 2.634 RESET = OPEN 3 2.5 Reset Threshold Voltage (V) 200 250 300 350 400 COUT = 1 F VOUT = Set to 2.8V 2.633 2.632 2.631 2.63 2.629 2.628 2.627 2.626 Output Voltage (V) 2 1.5 1 0.5 0 50 100 150 -40 -25 -10 5 20 35 50 65 80 95 110 125 Output Current (mA) Junction Temperature (C) FIGURE 2-26: Output Voltage vs. Current. FIGURE 2-29: Reset Threshold Voltage vs. Junction Temperature. 160 500 450 Short Circuit Current (mA) 400 350 300 250 200 150 100 50 0 1 Time to Reset Output (s) COUT = 1 F ROUT < 0.1 ohm VOUT = Set to 2.8V 140 120 100 80 60 40 2 3 4 5 6 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 Input Voltage (V) Overdrive Voltage (V below VTH) FIGURE 2-27: Short Circuit Current vs. Input Voltage. FIGURE 2-30: Reset Delay vs. Overdrive Voltage. 2002 Microchip Technology Inc. DS21702A-page 9 TC1307 Note: Unless otherwise indicated, V IN = 3.8V, CIN = 10 F ceramic (X5R), COUT = 1 F ceramic (X5R), ILOAD = 100 A, SELECT12 = NC, SELECT34 = VIN, SHDN1/2/3/4 = VIN, TA = 25C. Junction temperature (T J) is approximated by soaking the device under test at an ambient temperature equal to the desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the Ambient temperature is not significant. 0.80 0.70 0.60 5.97 VDET = 6.0V VDET = 2.55V 5.96 ISOURCE = 500 A RESET VOH (V) Reset V OL (V) 0.50 0.40 0.30 0.20 0.10 0.00 0.0 2.0 4.0 6.0 8.0 10.0 5.95 5.94 ISOURCE = 800 A 5.93 5.92 5.91 -40 -25 -10 5 20 35 50 65 80 95 110 125 Sink Current (mA) Junction Temperature (C) FIGURE 2-31: Reset VOL-RES vs. ISINK. FIGURE 2-34: Reset Temperature. VOH-RES vs.Junction 0.35 VDET = 2.55V 0.3 I SINK = 1.2 mA 0.25 Reset V OL (V) 0.2 0.15 0.1 0.05 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 I SINK = 3.2 mA Junction Temperature (C) FIGURE 2-32: Reset Temperature. 4.00 3.80 3.60 VOL-RES vs. Junction FIGURE 2-35: Power-Up RESET Timing. 325 VDET = 3.80V VDET = VIN = 3 .8V Reset V OH (V) 3.40 3.20 3.00 2.80 2.60 2.40 2.20 2.00 0.00 2.00 4.00 6.00 8.00 10.00 Ground Current (A) 300 275 250 225 200 0 25 50 75 100 125 150 Source Current (mA) Load Current (mA) FIGURE 2-33: Reset VOH-RES vs. ISOURCE. FIGURE 2-36: Ground Current vs. Load Current. DS21702A-page 10 2002 Microchip Technology Inc. TC1307 3.0 PIN DESCRIPTIONS Function Voltage Detect Input Shutdown for VOUT1 Input for setting VOUT1 and VOUT2. Input Voltage Connection Input Voltage Connection Ground connection Shutdown for V OUT3 Input Voltage Connection Shutdown for V OUT4 Input for setting VOUT3 and VOUT4. LDO4 Output LDO3 Output LDO2 Output LDO1 Output Shutdown for V OUT2 Reset Output 3.5 Ground (GND) The descriptions of the pins are listed in Table 3-1. Name VDET SHDN1 SELECT12 VIN VIN GND SHDN3 VIN SHDN4 SELECT34 VOUT4 VOUT3 VOUT2 VOUT1 SHDN2 RESET Connect this pin to the circuit ground. NOTE: This pin does not carry high current and should be connected to quiet circuit ground. 3.6 Shutdown Control Input for VOUT3 (SHDN3) LDO#3 output is enabled when a logic high is applied to the SHDN3 input. LDO#3 output is disabled with a logic low tied to the SHDN3 pin. When shutdown, LDO#3 enters a low quiescent current state and the linear pass P-Channel MOSFET is off. The RESET output remains valid and is independent of SHDN3. 3.7 Shutdown Control Input for VOUT4 (SHDN4) LDO#4 output is enabled when a logic high is applied to the SHDN4 input. LDO#4 output is disabled with a logic low tied to the SHDN4 pin. When shutdown, LDO#4 enters a low quiescent current state and the linear pass P-Channel MOSFET is off. The RESET output remains valid and is independent of SHDN4. TABLE 3-1: Pin Description Table. 3.8 3.1 Voltage Detect Input (VDET) SELECT Control Input for Setting VOUT3 and VOUT4 (SELECT34) Input pin that is compared to internal threshold voltage (typically 2.63V). When the VDET input is below the 2.63V threshold, the RESET output is held in its normal low state. When the input voltage on the VDET pin rises above the threshold voltage, the RESET output pin remains low for 300 mS (Typical). After the delay, the RESET pin changes to a logic high state. Input pin used to select the output voltage of LDO#3 and LDO#4. When SELECT is tied to VIN, V OUT3 = VOUT4 = 2.8V. When SELECT is tied to GND, VOUT3 = VOUT4 = 1.8V. If the SELECT input is not connected, VOUT3 = VOUT4 = 2.5V. 3.9 Regulated Output Voltage #4 (VOUT4) 3.2 Shutdown Control Input for VOUT1 (SHDN1) Output voltage selected by tri-state input SELECT34. Output can be set to 1.80V, 2.50V or 2.80V LDO#1 output is enabled when a logic high is applied to the SHDN1 input. LDO#1 output is disabled with a logic low tied to the SHDN1 pin. When shutdown, LDO#1 enters a low quiescent current state and the linear pass P-Channel MOSFET is off. The RESET output remains valid and is independent of SHDN1. 3.10 Regulated Output Voltage #3 (VOUT3) Output voltage selected by tri-state input SELECT34. Output can be set to 1.80V, 2.50V or 2.80V 3.11 Regulated Output Voltage #2 (VOUT2) 3.3 SELECT Control Input for Setting VOUT1 and VOUT2 (SELECT12) Output voltage selected by tri-state input SELECT12. Output can be set to 2.50V, 2.80V or 3.00V Input pin used to select the output voltage of LDO#1 and LDO#2. When SELECT is tied to VIN, VOUT1 = VOUT2 = 3.0V. When SELECT is tied to GND, VOUT1 = VOUT2 = 2.5V. If the SELECT input is not connected, VOUT1 = VOUT2 = 2.8V. 3.12 Regulated Output Voltage #1 (VOUT1) Output voltage selected by tri-state input SELECT12. Output can be set to 2.50V, 2.80V or 3.00V. 3.4 Input Voltage VIN Connect input source to this pin. All VIN pins must be tied together. 2002 Microchip Technology Inc. DS21702A-page 11 TC1307 3.13 Shutdown Control Input for VOUT2 (SHDN2) 3.14 RESET Output (RESET) Logic low output when voltage on VDET pin is below the RESET Threshold Voltage. When the voltage on the VDET pin rises above the RESET Threshold Voltage, the RESET output will remain low for the RESET Timeout Period and then transition to a logic high. LDO#2 output is enabled when a logic high is applied to the SHDN2 input. LDO#2 output is disabled with a logic low tied to the SHDN2 pin. When shutdown, LDO#2 enters a low quiescent current state and the linear pass P-Channel MOSFET is off. The RESET output remains valid and is independent of SHDN2. DS21702A-page 12 2002 Microchip Technology Inc. TC1307 4.0 DEVICE OVERVIEW The TC1307 integrates four high performance linear Low Dropout Regulators and a microcontroller reset function. As shown in the block diagram (Figure 4-3) using dashed lines, each LDO has an independent shutdown, error amplifier, P-MOS pass transistor and feedback divider resistors. All four LDOs share a common voltage reference. LDO output numbers one and two share a tri-state select input while LDO numbers three and four share a tri-state select input. The select input is used to program the LDO output voltage. Also shown in the block diagram is the microcontroller reset monitor. The reset monitor voltage detect input is independent of the LDO input or output voltages. ommended to lower the source impedance. For applications that have more than 1 F of capacitance on the LDO outputs, higher input capacitance (4.7 F) may be needed to ensure stability. 4.1.3 SHUTDOWN OPERATION 4.1 4.1.1 Low Dropout Out Linear Regulators OUTPUT Each LDO output can be enabled and disabled using its respective shutdown input pin. For example, when the level on SHDN1 is below the logic low level threshold (VIL), LDO#1 output is disabled (P-Channel MOSFET is turned OFF). If all four shutdown inputs are below VIL, the bandgap reference is turned off and the shutdown current is typically less than 0.1 A. The LDO output will typically wake-up in 10 s and the output will settle in approximately 40 s when brought out of shutdown mode. See Figure 4-1 for timing definition. The microcontroller RESET output function is independent of all SHDN input pins. 4.2 Voltage Reset Monitor The TC1307 integrates four low drop out linear regulators. Each regulator has 150 mA output current capability. A minimum of 1 F output capacitance is required on each of the LDOs for circuit stability. The output capacitor type can be ceramic, tantalum or aluminum. The esr range required for the output capacitor is 0 to 2 . To improve the dynamic performance of the LDO in cases where sudden input voltage changes or load current changes are present, larger capacitors can be used. The output voltage of the LDO can be selected using the SELECT input pins. Table 4-1 summarizes how to select the desired LDO output voltage for VOUT1 and VOUT2. Table 4-2 summarizes how to select the desired LDO output voltage for V OUT3 and VOUT4. SELECT12 GND No Connect VIN TABLE 4-1: SELECT34 GND No Connect VIN TABLE 4-2: 4.1.2 INPUT VOUT1 2.50V 2.80V 3.00V VOUT2 2.50V 2.80V 3.00V The independent voltage reset output of the TC1307 can be used for low battery input voltage detect or microcontroller power on reset function. The voltage reset function monitors the voltage on the VDET pin. The active low RESET output is capable of sourcing and sinking current (Push-Pull). When the voltage on the VDET pin is below the 2.63V typical threshold, the RESET output pin is active low and capable of sinking 3.2 mA while holding the RESET output voltage below 0.4V. When the voltage on the VDET pin rises above the 2.63V typical threshold, the RESET output will remain low for the TRESET time period. After the RESET time out period, the RESET output voltage will transition to the high output state (> VDET-1.5V when sourcing 800 A), if the VDET pin remains above the threshold voltage. The RESET output is current limited. The maximum source or sink current recommended for normal operation is 10 mA. The RESET output will be driven low within 100 sec of VDET pin going below the RESET voltage threshold of 2.63V typical. The RESET output will remain valid for VDET voltages greater than 1.0V. See Figure 4-2 for VDET and RESET output timing diagram. SELECT12 MODE settings. VOUT3 1.80V 2.50V 2.80V VOUT4 1.80V 2.50V 2.80V SELECT34 MODE Settings. The TC1307, like all low drop out linear regulators, requires a relatively low source impedance (< 10 ) tied to the VIN pin of the device to ensure circuit stability. For battery applications or in applications that have long lead length from the input voltage source to the LDO VIN pin, a minimum capacitance of 2.2 F is rec- 2002 Microchip Technology Inc. DS21702A-page 13 TC1307 VIH VIL tS 90% VOUT 10% tWK SHDN FIGURE 4-1: Wake-up From SHDN. VTH VDD TRESET TVDET-RESET VOH_RES RESET 1V VOL_RES FIGURE 4-2: RESET Timing Diagram. DS21702A-page 14 2002 Microchip Technology Inc. TC1307 1 VDET + VREF2 tDELAY C (300ms) RESET 16 OVERTEMPERATURE 8 VIN VIN SHDN1 SEL12 VREF 2 SHDN1 VIN SHDN VREF + A VOUT1 14 VIN 15 SHDN2 3 SELECT12 SHDN2 SEL12 VREF + A VOUT2 13 VIN 4 7 SHDN3 VIN SHDN3 SEL34 VREF + A VOUT3 12 9 VIN SHDN4 SHDN4 SEL34 VREF VIN 5 10 6 SELECT34 + A VOUT4 11 GND FIGURE 4-3: TC1307 Block Diagram. 2002 Microchip Technology Inc. DS21702A-page 15 TC1307 5.0 5.1 APPLICATIONS Load Partitioning 5.3 Output Capacitor The TC1307 can be used to power two separate channels for a wide range of applications. Each channel can be turned ON and OFF independently of the other. In this example, the SELECT12 pin is tied to V IN and the SELECT34 pin is tied to GND. The output voltages of VOUT1 and VOUT2 are 3.0V and the output voltage of VOUT3 and VOUT4 are 1.8V. If V OUT1 and V OUT3 were powering 1 Channel and V OUT2 and V OUT4 were powering an identical Channel, either Channel could be powered independent of the other Channel. The output voltage of V OUT1 is being monitored by the internal voltage detection circuit. When the output of V OUT1 is below the typical 2.63V threshold voltage, the RESET output will transition low. A minimum output capacitance of 1 F for the TC1307 is required for stability. The esr requirements on the output capacitor are between 0 and 2 ohms. The output capacitor should be located as close to the LDO output as practical. Ceramic materials X7R and X5R have low temperature coefficients and are well within the acceptable esr range required. A typical 1 F X5R 0805 capacitor has an esr of 50 milli-ohms. Larger output capacitors can be used with the TC1307 to improve dynamic behavior, noise and ripple rejection performance. 5.4 Power Dissipation 5.2 Input Capacitor Low input source impedance is necessary for the LDO to operate properly. When operating off of batteries or in applications with long lead length (>10") between the input source and the LDO, some input capacitance is required. A minimum of 2.2 F is recommended for most applications and the capacitor should be placed as close to the input of the LDO as practical (>0.2"). Larger input capacitors will help reduce the input impedance and further reduce any high frequency noise on the input and output of the LDO. If more than 1 F of capacitance is used on the LDO outputs, a 4.7 F input capacitor is recommended. The internal power loading within the TC1307 is a function of input voltage, output voltage, output current, quiescent current and RESET output dissipation. For many applications the power dissipation within the linear P-Channel device can be used as a good approximation of total power dissipation. This is due to the low quiescent current consumed even when the LDO output is providing full load current (150 mA). Shutdown #2 Micro Controller VDET Shutdown #1 SHDN1 SELECT12 VIN 4.7 F VIN GND Battery Input SHDN3 VIN 1 2 TC1307 3 4 5 6 7 8 14 13 12 11 10 9 16 15 RESET SHDN2 VOUT1 VOUT2 VOUT3 VOUT4 +1.8V 1 F +1.8V 1 F +3.0V 1 F +3.0V 1 F MCLR or RESET VDD SELECT34 SHDN4 Shutdown #3 Shutdown #4 FIGURE 5-1: Typical 4 Output with RESET Application. DS21702A-page 16 2002 Microchip Technology Inc. TC1307 5.4.1 P-CHANNEL LINEAR PASS DEVICE P RESET = ( V DET - V SOURCE ) x I SOUR CE P Li near = ( V IN ( MAX ) - V OU T ( MIN ) ) x I OUT ( MAX ) Where: PLinear = Power dissipated in the LDO P-Channel linear pass element. VIN(MAX) = Maximum input voltage (VIN) VOUT(MAX) = Minimum LDO output Voltage (VOUT) IOUT(MAX) = Maximum LDO output current 5.4.2 QUIESCENT CURRENT Where: PRESET = Power dissipation as a result of RESET output while in the high state VDET = Detect Voltage VSOURCE = RESET output pin voltage while in the high state ISOURCE = Output current being sourced 5.4.4 TOTAL INTERNAL POWER DISSIPATION The quiescent current consumed by the TC1307 has two components. The quiescent current required to bias the LDO regulators and the quiescent current required to bias the voltage detection circuitry. To determine the power dissipation as a result of the total device quiescent current both the maximum input voltage on the VIN and VDET inputs should be used. P Q = V IN x I IN + V DET x I D ET Where: PQ = Power internal to the LDO as a result of internal biasing VIN = Input voltage IIN = Input current when all load currents = 0 mA VDET = Detect Input Voltage IVDET = Voltage detect input pin current 5.4.3 RESET OUTPUT The total power dissipated within the TC1307 is the sum of the power dissipated in each of the four LDOs, the PQ term and the PRESET term (either sinking or sourcing). Because of the CMOS construction, the typical IIN for the TC1307 is 220 A. When operating at a maximum of 5V this results is a power dissipation of 1.2 milli-Watts. For most applications this is small compared to the LDO pass device power dissipation and can be neglected. The PRESET term for a typical 3.2 mA sinking application will dissipate a maximum of 3.2 mA x 0.4V or 1.28 milli-Watts. A typical sourcing application of 800 A will have a maximum 1.5V drop from the VDET voltage will dissipate a maximum of 800 A x 1.5V or 1.2 milli-Watts. Again for most applications this is small compared to the LDO pass device power dissipation and can be neglected. P TOTAL = P Li ne ar + P Q + P RESET 5.4.5 MAXIMUM JUNCTION TEMPERATURE The power dissipation for the RESET output driver can be a result of the sinking current or sourcing current depending on the state of the output. P RESE T = V OL x I SINK Where: PRESET = Power dissipated as a result of the RESET output. VOL = RESET low output voltage ISINK = RESET sink current The power dissipation internal to the RESET output due to sourcing current can be calculated by using the following equation. The operating junction temperature (TJ) specified for the TC1307 is 125C. To estimate the internal junction temperature of the TC1307, the total internal power dissipation (PTOTAL) is multiplied by the thermal resistance from junction to ambient (JA) of the device. The thermal resistance from junction to ambient for the QSOP 16-pin package is estimated at 112.4C/W. The actual thermal resistance from junction to air can vary from application to application for the QSOP16 depending on board copper area, copper thickness, airflow and other external environmental factors. T J ( MAX ) = P TO TAL x JA The maximum power dissipation capability for a package (PD(MAX)) can be calculated given the junction to air thermal resistance and the maximum ambient temperature (TA(MAX)) for the application. The following equation can be used to determine the package maximum internal power dissipation. 2002 Microchip Technology Inc. DS21702A-page 17 TC1307 P D ( MAX ) ( T J ( MAX ) - T A ( MAX ) ) = -------------------------------------------------- JA Device Junction Temperature Rise The internal junction temperature rise is a function of internal power dissipation and the thermal resistance from junction to ambient for the application. The thermal resistance from junction to air (JA) is derived from an EIA/JEDEC standard for measuring thermal resistance for small surface mount packages. The EIA/ JEDEC specification is JESD51-7 "High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages". The standard describes the test method and board specifications for measuring the thermal resistance from junction to case. The actual thermal resistance for a particular application can vary depending on many factors such as copper area and thickness. Refer to AN792 for more information regarding this subject. TJRISE = PTOTAL x JA TJRISE = 516.4 milli-Watts x 112.4C/Watt TJRISE = 58.1C 5.5 Typical Application Internal power dissipation, junction temperature rise, junction temperature and maximum power dissipation are calculated in the following example. The power dissipation as a result of quiescent current and RESET output are small enough to be neglected. Input Voltage: VIN = 3.1V to 4.1V LDO Output Voltages and Currents: VOUT1 = 3.0V IIOUT1 = 100 mA VOUT2 = 3.0V IIOUT2 = 100 mA VOUT3 = 1.8V IIOUT3 = 60 mA VOUT4 = 1.8V IIOUT4 = 60 mA Junction Temperature Estimate To estimate the internal junction temperature (TJ), the calculated junction temperature rise (TJRISE) is added to the ambient or offset temperature (TAMBIENT). For this example the worst case junction temperature is estimated below. TJ =T JRISE + TAMBIENT TJ =108.1C Maximum Ambient Temperature: TA(MAX)= 50C Internal Power Dissipation: Internal Power dissipation is the sum of the power dissipation for each LDO pass device. PLDO1 = (VIN(MAX)-VOUT1(MIN)) x IOUT1(MAX) PLDO1 = (4.1V - (0.975 x 3.0V)) x 100 mA PLDO1 = 117.5 milli-Watts PLDO2 = (4.1V - (0.975 x 3.0V)) x 100 mA PLDO2 = 117.5 milli-Watts PLDO3 = (4.1V - (0.975 x 1.8V)) x 60 mA PLDO3 = (2.35V x 60 mA) PLDO3 = 140.7 milli-Watts PLDO4 = (4.1V - (0.975 x 1.8V)) x 60 mA PLDO4 = 140.7 milli-Watts PTOTAL = PLDO1 + PLDO2 + PLDO3 + PLDO4 PTOTAL = 516.4 milli-Watts Maximum Package Power Dissipation The maximum power dissipation capability for the TC1307 can be approximated by finding the maximum allowable temperature rise from junction to case and dividing that by the estimated thermal resistance of the application. For this example, the maximum allowable junction temperature rise is 125C - 50C or 75C. By dividing 75C by the estimated thermal resistance (112.4C/Watt), the maximum allowable power dissipation is calculated to be 667.3 milli-Watts. 5.6 5.6.1 Device Protection OVER CURRENT LIMIT In the event of a faulted output load, the maximum current the LDO will permit to flow is limited internally. For each of the four LDO's internal to the TC1307, the limit in the event of a short circuit will be 360 mA typical. This limit can be used to prevent damage to the circuit board or connectors. The over current protection for each LDO output is independent. For example, if LDO1 output is shorted to ground, the over current protection will limit the output current for LDO1. If the junction temperature does not rise above the typical 150C thermal shutdown point the other three LDO outputs (LDO2, LDO3, LDO4) will remain within regulation. DS21702A-page 18 2002 Microchip Technology Inc. TC1307 5.6.2 OVER TEMPERATURE PROTECTION If the internal power dissipation within the TC1307 is excessive due to a faulted load or higher than specified line voltage, an internal temperature sensing element will prevent the junction temperature from exceeding approximately 150C. If the junction temperature does exceed approximately 150C, all LDO outputs will be disabled until the junction temperature cools to approximately 140C, at which point the device will resume normal operation. The RESET output will continue to operate normally in the event of a thermal shutdown. to be wide. It is more important for the GND pins to be connected to a quiet circuit ground. Noise on the GND pins may result in noise at the output of the LDO. In Figure 5-2, a ground plane is used to connect the TC1307 Pins to the GND plane that has the VOUT capacitor return tied to it. For applications that have ripple voltage on the input, the CIN capacitor return can be separated from the ground plane by running a trace from the capacitor to the ground plane. This impedance will help to reduce the noise on the output of the LDO. The output voltage regulation uses the GND pins of the TC1307 as the return path for the internal bandgap reference. Any voltage drops between the load and the respective VOUT pin and GND pin will show up as regulation losses. It is important to size the VOUT and GND conductors for minimum voltage drops. The maximum application load current will determine how large these traces should be. As shown in Figure 5-2, a ground plane can be used minimize the trace resistance from the load to the TC1307 GND pin. 5.7 Recommended Physical Layout Figure 5-2 represents a typical layout using the TC1307 16-pin QSOP package. C1, C2, C3 and C 4 are 1 F X5R 0603 ceramic output capacitors and C IN is a 2.2 F X5R 0805 ceramic capacitor. No other components are required for this quad output LDO with microcontroller reset function. Utilizing the highly integrated TC1307, the total board area required is less than 0.300 square inches. For CMOS LDOs, the GND or quiescent current is small when compared to the maximum output current capability. The GND pins connected to the TC1307 do not carry high current and it is not necessary for them SHDN1 CIN SHDN2 Pin 1 C1 C2 SHDN3 Backplane Traces C4 C3 RESET VOUT1 VOUT2 VOUT3 VOUT4 SHDN4 = GND Plane = Top Metal Layer FIGURE 5-2: TC1307 Typical Layout. 2002 Microchip Technology Inc. DS21702A-page 19 TC1307 6.0 6.1 PACKAGING INFORMATION Package Marking Information 1 2 3 4 5 6 7 8 TC1307 YYWW NNN 16 15 14 13 12 11 10 9 Legend: XX...X YY WW NNN Customer specific information* Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. DS21702A-page 20 2002 Microchip Technology Inc. TC1307 6.2 Taping Form Component Taping Orientation for 16-Pin QSOP (Narrow) Devices User Direction of Feed PIN 1 User Direction of Feed W PIN 1 Standard Reel Component Orientation for TR Suffix Device P Reverse Reel Component Orientation for RT Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size: Package 16-Pin QSOP (N) Carrier Width (W) 12 mm Pitch (P) 8 mm Part Per Full Reel 2500 Reel Size 13 in. 6.3 Packaging Information 16-Pin QSOP (Narrow) PIN 1 .157 (3.99) .244 (6.20) .150 (3.81) .228 (5.80) .196 (3.05) .189 (2.67) .010 (0.25) .004 (0.10) .069 (1.75) .053 (1.35) 8 MAX. .050 (1.27) .015 (0.40) .010 (0.25) .007 (0.19) .025 (0.635) TYP. .012 (0.31) .008 (0.21) 2002 Microchip Technology Inc. DS21702A-page 21 TC1307 NOTES: DS21702A-page 22 2002 Microchip Technology Inc. TC1307 ON-LINE SUPPORT Microchip provides on-line support on the Microchip World Wide Web (WWW) site. The web site is used by Microchip as a means to make files and information easily available to customers. To view the site, the user must have access to the Internet and a web browser, such as Netscape or Microsoft Explorer. Files are also available for FTP download from our FTP site. Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products. Plus, this line provides information on how customers can receive any currently available upgrade kits.The Hot Line Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-480-792-7302 for the rest of the world. 013001 Connecting to the Microchip Internet Web Site The Microchip web site is available by using your favorite Internet browser to attach to: www.microchip.com The file transfer site is available by using an FTP service to connect to: ftp://ftp.microchip.com The web site and file transfer site provide a variety of services. Users may download files for the latest Development Tools, Data Sheets, Application Notes, User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also available, including listings of Microchip sales offices, distributors and factory representatives. Other data available for consideration is: * Latest Microchip Press Releases * Technical Support Section with Frequently Asked Questions * Design Tips * Device Errata * Job Postings * Microchip Consultant Program Member Listing * Links to other useful web sites related to Microchip Products * Conferences for products, Development Systems, technical information and more * Listing of seminars and events 2002 Microchip Technology Inc. DS21702A-page 23 TC1307 READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this Data Sheet. To: RE: Technical Publications Manager Reader Response Total Pages Sent From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Device: TC1307 Questions: 1. What are the best features of this document? Y N Literature Number: DS21702A FAX: (______) _________ - _________ 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this data sheet easy to follow? If not, why? 4. What additions to the data sheet do you think would enhance the structure and subject? 5. What deletions from the data sheet could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS21702A-page 24 2002 Microchip Technology Inc. TC1307 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X -XX X X X XX Tape & Reel Examples: a) TC1307R-XYVQRTR Device Threshold LDO Temp. Packaging # Leads Type Voltage Output Range Voltages Device: TC1307: 4-Channel LDO w/Select Mode, Shutdown and Independent Reset 2.63V Threshold Voltage: LDO Output Voltages: R XY XY XY XY V = = = = = = 1.8V 2.5V 2.8V 3.0V -40C to +125C (Extended) Temperature Range: Package: Tape and Reel: QR = QSOP Package, 16-lead TR = Tape and Reel Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2002 Microchip Technology Inc. DS21702A-page25 TC1307 NOTES: DS21702A-page 26 2002 Microchip Technology Inc. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microID, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Term Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. 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No. 6 Chaoyangmen Beidajie Beijing, 100027, No. China Tel: 86-10-85282100 Fax: 86-10-85282104 Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Atlanta 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 Fax: 770-640-0307 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850 Boston 2 Lan Drive, Suite 120 Westford, MA 01886 Tel: 978-692-3848 Fax: 978-692-3821 China - Chengdu Microchip Technology Consulting (Shanghai) Co., Ltd., Chengdu Liaison Office Rm. 2401, 24th Floor, Ming Xing Financial Tower No. 88 TIDU Street Chengdu 610016, China Tel: 86-28-6766200 Fax: 86-28-6766599 Chicago 333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075 Taiwan Microchip Technology Taiwan 11F-3, No. 207 Tung Hua North Road Taipei, 105, Taiwan Tel: 886-2-2717-7175 Fax: 886-2-2545-0139 Dallas 4570 Westgrove Drive, Suite 160 Addison, TX 75001 Tel: 972-818-7423 Fax: 972-818-2924 China - Fuzhou Microchip Technology Consulting (Shanghai) Co., Ltd., Fuzhou Liaison Office Rm. 531, North Building Fujian Foreign Trade Center Hotel 73 Wusi Road Fuzhou 350001, China Tel: 86-591-7557563 Fax: 86-591-7557572 EUROPE Denmark Microchip Technology Nordic ApS Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45 4420 9895 Fax: 45 4420 9910 Detroit Tri-Atria Office Building 32255 Northwestern Highway, Suite 190 Farmington Hills, MI 48334 Tel: 248-538-2250 Fax: 248-538-2260 China - Shanghai Microchip Technology Consulting (Shanghai) Co., Ltd. Room 701, Bldg. B Far East International Plaza No. 317 Xian Xia Road Shanghai, 200051 Tel: 86-21-6275-5700 Fax: 86-21-6275-5060 Kokomo 2767 S. Albright Road Kokomo, Indiana 46902 Tel: 765-864-8360 Fax: 765-864-8387 France Microchip Technology SARL Parc d'Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Los Angeles 18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 949-263-1888 Fax: 949-263-1338 China - Shenzhen Microchip Technology Consulting (Shanghai) Co., Ltd., Shenzhen Liaison Office Rm. 1315, 13/F, Shenzhen Kerry Centre, Renminnan Lu Shenzhen 518001, China Tel: 86-755-2350361 Fax: 86-755-2366086 New York 150 Motor Parkway, Suite 202 Hauppauge, NY 11788 Tel: 631-273-5305 Fax: 631-273-5335 Germany Microchip Technology GmbH Gustav-Heinemann Ring 125 D-81739 Munich, Germany Tel: 49-89-627-144 0 Fax: 49-89-627-144-44 San Jose Microchip Technology Inc. 2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955 Hong Kong Microchip Technology Hongkong Ltd. Unit 901-6, Tower 2, Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Italy Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 Toronto 6285 Northam Drive, Suite 108 Mississauga, Ontario L4V 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509 India Microchip Technology Inc. India Liaison Office Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062 United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 01/18/02 *DS21702A* DS21702A-page 28 2002 Microchip Technology Inc. |
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